UM2102S-Level Shifter-Interface-Products-Union Semiconductor

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Reliability Report

	Outline-SOT23-6.pdf
	Land Pattern-SOT23-6.pdf

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Key Specifications

Part Number	Description	Status	VCCA(Min)(V)	VCCA(Max)(V)	VCCB(Min)(V)	VCCB(Max)(V)	Max Data Rate(Mbps)	No. of Bits	Operating Temperature Range(℃)	Pin/Package	EV Kit Available?
UM2102S	2-Bit Bidirectional Voltage-Level Translator for Open-Drain and Push-Pull Application	ACTIVE	1	3.3	1.8	5	66	2	-40 to 85	6/SOT23	Y

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Product Description

The UM2102S allows bidirectional voltage translations between 1.5V and 5V without the use of a direction pin. The UM2012S is not a bus buffer which provides both level translation and physically isolates the capacitance to either side of the bus when both sides are connected. The UM2102S only isolates both sides when the VREF is connected to GND.

Pull-up resistors are required on both sides to provide the logic HIGH levels on the translator’s bus. The size of these pull-up resistors depends on the system. The device is designed to work with Standard-mode, Fast-mode and Fast-mode Plus I²C-bus devices in addition to SMBus devices. The maximum frequency is dependent on the RC time constant, but generally supports > 2MHz.

When the SDA1 or SDA2 port is LOW, the clamp is in the ON-state and a low resistance connection exists between the SDA1 and SDA2 ports. Assuming the higher voltage is on the SDA2 port when the SDA2 port is HIGH, the voltage on the SDA1 port is limited to the voltage set by V_CCA. When the SDA1 port is HIGH, the SDA2 port is pulled to the drain pull-up supply voltage (V_CCB) by the pull-up resistors. This functionality allows a seamless translation between higher and lower voltages selected by the user without the need for directional control. The SCL1/SCL2 channel also functions as the SDA1/SDA2 channel.

All channels have the same electrical characteristics and there is minimal deviation from one output to another in voltage or propagation delay. This is a benefit over discrete transistor voltage translation solutions, since the fabrication of the switch is symmetrical.

The translator provides excellent ESD protection to lower voltage devices, and at the same time protects less ESD-resistant devices.

Features

-Less than 3.5ns Maximum Propagation Delay to Accommodate Standard-Mode and Fast-Mode I²C-Bus Devices and Multiple Masters

l-Open-Drain I²C-Bus I/O Ports (SCL1, SDA1, SCL2 and SDA2)

Provides Bidirectional Voltage Translation with no Direction Pin

-Low 3.0Ω ON-State Connection between Input and Output Ports Provides Less Signal Distortion

-5V Tolerant I²C-Bus I/O Ports to Support Mixed-Mode Signal Operation

-Lock-up Free Operation

-Flow through Pinout for Ease of Printed-Circuit Board Trace Routing

-ESD Protection :

Exceeds 2000V HBM per JESD22-A114

200V MM per JESD22-A115